A charge pump is a particular voltage booster circuit, which is used to generate a voltage higher than its power supply voltage. For example, charge pumps commonly find application in an integrated circuit including a non-volatile memory with floating-gate transistors. In this case, a high-voltage is needed to program and/or erase the memory. In order to avoid the need to provide an external power supply voltage of high value, the integrated circuit is designed to have one or more internal charge pumps for producing the high-voltage from the (lower) power supply voltage.
Operation of a charge pump is based on the continuous accumulation and transfer of electric charge in a sequence of pumping capacitors, which are connected through corresponding switching elements. Particularly, each pumping capacitor has a free terminal, which is controlled by a signal switching between a low-voltage and a high-voltage; the control signals of adjacent pumping capacitors are always anti-phase. In this way, when the control signal is at the low-voltage the pumping capacitor is charged by the previous pumping capacitor; when the control signal switches to the high-voltage, the accumulated charge is transferred to the next pumping capacitor.
A classic implementation of the charge pump in which the switching elements consist of diodes is described in John F. Dickson, “On-Chip High-voltage Generation in NMOS Integrated Circuits Using an Improved Voltage Multiplier Technique”, IEEE Journal of Solid State Circuits, vol. 11, no. 2, pp. 374-378, June 1976, the entire disclosure of which is herein incorporated by reference. A drawback of this charge pump is the unavoidable loss in its output voltage due to the threshold voltage and to the conduction resistance of the diodes. This drawback is exacerbated as the number of stages of the charge pump increases, because each additional stage further decrements the output voltage.
Alternatively, the diodes are replaced with pass transistors. For example, each pass transistor can be an NMOS transistor having the drain terminal connected to an input of the stage and the source terminal connected to an output of the stage; the gate terminal of the pass transistor is controlled by a signal that maintains the gate to source voltage of the pass transistor higher than its threshold value as the source voltage increases due to the charge transfer process. A known solution for obtaining this result is to use a four-phase architecture, with two additional control signals dedicated to over driving the gate terminals of the pass transistors. This solution, however, requires a more complex circuit for the generation of the control signals.
A different solution with a two-phase architecture is based on the use of pass transistors of the low-voltage type, which exhibit a reduced threshold voltage. In this case, the output resistance of the charge pump (whose value influences the efficiency of the entire circuit) can be favorably reduced by increasing its operating frequency and using transistors with lower parasitic capacitances. Furthermore, it is possible to use smaller pumping capacitors, thus saving silicon area on the chip. However, it is necessary to introduce a dedicated circuit architecture that allows the utilization of low-voltage transistors (typically based on two cross-coupled branches). An example of such a charge pump is described in R. Pelliconi et al., “Power Efficient Charge Pump in Deep Submicron Standard CMOS Technology”, IEEE Journal of Solid State Circuits, vol. 38, no. 6, June 2003, the entire disclosure of which is herein incorporated by reference. According to this document, in each stage the charge transfer occurs through the use of two pass transistors of opposite type at a time; as a result, the effects of their threshold voltages are canceled (being of opposite signs). However, the two pass transistors that are series connected in each stage double its conductive resistance.
Japanese Patent Laid-Open Publication No. 08-322241, the entire disclosure of which is herein incorporated by reference, illustrates a solution for solving the threshold voltage loss drawback (in a two-phase charge pump of the high-voltage type) using a dynamic system for biasing the pass transistors. Particularly, each pass transistor is a PMOS transistor having the source terminal connected to the input of the stage and the drain terminal connected to the output of the stage. The gate terminal of the pass transistor is selectively connected to the input of the preceding stage (to turn it on), or to the output of the stage (to turn it off). This solution, however, is not suitable for use with low-voltage transistors that withstand a gate to source voltage swing at most equal to the supply voltage. In the circuit architecture proposed by this solution, each pass transistor is driven by a gate to source voltage that is higher than the supply voltage (particularly, equal to twice the supply voltage).